Differences

This shows you the differences between two versions of the page.

--- espressif [2026/05/24 11:05] – mrmaxthemac
+++ espressif [2026/05/24 11:08] (current) – mrmaxthemac
@@ Line 14: / Line 14: @@
 **Market Need**
-The success of the [[esp8266|ESP8266]] can be attributed in part to the growing demand for [[internet_of_things|IoT]] devices and the need for affordable, low-power wireless connectivity solutions. As more consumers began integrating smart home devices into their daily lives, companies like Amazon (Alexa) and Google (Home) emerged as leaders in the market. However, these early smart speakers required robust processing power and reliable wireless connectivity, driving innovation in chip design.
+The success of the [[esp8266|ESP8266]] can be attributed in part to the growing demand for [[internet_of_things|IoT]] devices and the need for affordable, low-power wireless connectivity solutions. As more consumers began integrating smart home devices into their daily lives, these early smart speakers required robust processing power and reliable wireless connectivity- driving innovation in chip design.
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 Encouraged by the success of the [[esp8266|ESP8266]], Espressif Systems began developing its next-generation [[microcontroller|microcontroller]], the [[esp32wroom1|ESP32]]. Released in 2017, the [[esp32wroom1|ESP32]] was designed to address the shortcomings of its predecessor while adding new features like dual-core processing and improved memory capacity.
-{{:esp-wroom-32_dev_board_small.png?nolink&400 |}}
+{{ :esp-wroom-32_dev_board_small.png?nolink&350|}}
 **Design Philosophy**
@@ Line 55: / Line 55: @@
 {{ :riscv_cpu_esp32_s2.jpg?nolink&200|}}
-{{:esp32-s3_on_paper.png?nolink&200 |}}
+{{:esp32-s3_on_paper.png?nolink&300 |}}
 **Continued Innovation**
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   * __[[esp32s2|ESP32-S2]]__: A low-power variant of the [[esp32wroom1|ESP32]], featuring a single-core 32-bit [[xtensa|Xtensa LX7]] processor and optimized for ultra-low power consumption.
   * __[[esp32s3|ESP32-S3]]__: A next-generation microcontroller built on the [[xtensa|Xtensa LX7]] architecture, offering improved performance and efficiency compared to its predecessors.
-  * __[[esp32c3|ESP32-C3]]__: Very Low-cost variant of the [[esp32wroom1|ESP32]], featuring a single-core 32-bit [[risc|RISC-V]] processor and targeting entry-level IoT applications.
+  * __[[esp32c3|ESP32-C3]]__: Very Low-cost variant of the [[esp32wroom1|ESP32]], featuring a single-core 32-bit [[risc|RISC-V]] processor and targeting entry-level [[internet_of_things|IoT]] applications.
-  * __[[esp32c6|ESP32-C6]]__: Lower-cost variant of the [[esp32wroom1|ESP32]], featuring a dual-core 32-bit [[risc|RISC-V]] processor and targeting mid range IoT applications.
+  * __[[esp32c6|ESP32-C6]]__: Lower-cost variant of the [[esp32wroom1|ESP32]], featuring a dual-core 32-bit [[risc|RISC-V]] processor and targeting mid range [[internet_of_things|IoT]] applications.
-  * __[[esp32p4|ESP32-P4]]__: A new high-end variant of the [[esp32wroom1|ESP32]], built on the [[risc|RISC-V]] architecture and featuring Wi-Fi 6 and Bluetooth 5.2 connectivity. Has 2 Performance cores and 1 efficiency core. Much more memory than it's predecessors allows small ai models to run.
+  * __[[esp32p4|ESP32-P4]]__: A new high-end variant of the [[esp32wroom1|ESP32]], built on the [[risc|RISC-V]] architecture and featuring [[wifi|Wi-Fi 6]] and Bluetooth 5.2 connectivity. Has 2 Performance cores and 1 efficiency core. Much more memory than it's predecessors allows small ai models to run.