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| risc [2026/05/24 10:25] – mrmaxthemac | risc [2026/05/24 11:18] (current) – mrmaxthemac |
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| The [[esp32|ESP32 family]] of [[microcontroller|microcontrollers]], developed by [[espressif|Espressif Systems]], uses the [[risc|RISC-V]] architecture for its processor core. | The [[esp32|ESP32 family]] of [[microcontroller|microcontrollers]], developed by [[espressif|Espressif Systems]], uses the [[risc|RISC-V]] architecture for its processor core. |
| Specifically: | Specifically: |
| * __[[esp32c2|ESP32-C2]]:__ single core 32-bit RISC-V processor. | * __[[esp32c2|ESP32-C2]]:__ single core 32-bit [[risc|RISC-V]] processor. |
| * __[[esp32c3|ESP32-C3]]:__ single core 32-bit RISC-V processor. | * __[[esp32c3|ESP32-C3]]:__ single core 32-bit [[risc|RISC-V]] processor. |
| * __[[esp32c5|ESP32-C5]]:__ dual core 32-bit RISC-V split speed processor (1 performance core, 1 efficiency core). | * __[[esp32c5|ESP32-C5]]:__ dual core 32-bit [[risc|RISC-V]] split speed processor (1 performance core, 1 efficiency core). |
| * __[[esp32c6|ESP32-C6]]:__ dual core 32-bit RISC-V split speed processor (1 performance core, 1 efficiency core). | * __[[esp32c6|ESP32-C6]]:__ dual core 32-bit [[risc|RISC-V]] split speed processor (1 performance core, 1 efficiency core). |
| * __[[esp32h2|ESP32-H2]]:__ single core 32 bit RISC-V processor. | * __[[esp32h2|ESP32-H2]]:__ single core 32 bit [[risc|RISC-V]] processor. |
| * __[[esp32p4|ESP32-P4]]:__ three core 32 bit RISC-V split speed processor (2 performance cores, 1 efficiency core). | * __[[esp32p4|ESP32-P4]]:__ three core 32 bit [[risc|RISC-V]] split speed processor (2 performance cores, 1 efficiency core). |
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mrmaxthemac